Recent searches
Search options
Just published Teensy64 firmware for Teensy 4.1 working as a drop-in 6510 replacement for C64 https://github.com/ytmytm/teensy64
In the fastest mode (none of memory accesses are passed to C64 bus) it's over 40x faster than a stock C64, twice the SCPU speed. This works somewhat like Amiga's fast/slow RAM. You need to write back data in synchronized mode to make it visible to VIC. But you don't need it always (e.g. after prg decrunching).
https://www.youtube.com/watch?v=dn2THEtvaW8
vs
@ytm Makes me wonder what would happen if you took a C64 and sped everything up so it would work with a 4K resolution instead. But keep the rest the same. Well upped address space/memory etc. :)
Mostly just a thought experiment, don’t think it would be useful:)
This on the other hand sounds really neat!
@mos_8502 That's how it mostly works right now. For simplicity Kernal and BASIC ROMs are stored in Teensy's flash, together with a simple 8k cartridge ROM that you can switch in/out.
In the fastest mode Teensy touches C64 bus only when emulated CPU does I/O write.
There is also a middle ground (~3.4x speedup) when all writes go to the bus.
Another thing that came to my mind are x86 MTRR registers - we might fine tune this and define which memory ranges are synchronized.
@breadbin
I listed my pipe dreams at the bottom of README in that repository :) multiple expansions, mulitple CPU cores. There is plenty of space in 8MBs of Teensy flash.
But you gave me an idea - what if I would replace onboard DRAM with fast SRAM: how much data I could push from Teensy to onboard RAM (for VIC) within 500ns of each CPU clock phase before VIC takes over.
@ytm I think it’s so cool that people are creating these things. There’s a spirit of wonder than newer hardware simply don’t have (but it has other things).
Never stop:)